ADDITION, SUBTRACTION AND COMPARISON in ASSEMBLY LANGAGE

ADD (Addition) • This is used to add byte/word of data of 2 registers or a register & a memory-location • The only types of addition not allowed are memory-to-memory and segment register (Table 5-1). Register Addition • Whenever arithmetic and logic instructions execute, the contents of the flag-register changes. • Any ADD instruction modifies contents of sign, zero, carry, auxiliary, carry, parity & overflow flags. Example 5-1: Program to compute AX=BX+CX+DX. ADD AX,BX ADD AX,CX ADD AX,DX Immediate Addition • Immediate addition is employed whenever constant-data are added. Example 5-2: Program to add immediate data MOV DL,12H ADD DL,33H Memory-to-Register Addition Example 5-3: to add two consecutive bytes of data (stored at the data segment offset locations NUMB and NUMB+1) to the AL register. Array Addition Example 5-4: Program to add the contents of array element at indices 3, 5 and 7 MOV AL,0 ;clear sum MOV SI,3 ;address element 3 ADD AL,ARRAY[SI] ;add element 3 ADD AL,ARRAY[SI+2] ;add element 5 ADD AL,ARRAY[SI+4] ;add element 7 INC(Increment Addition) • This adds 1 to any register or memory-location, except a segment-register (Table 5-2). • With indirect memory increments, the size of the data must be described by using the BYTE PTR, WORD PTR directives. The reason is that the assembler cannot determine if, for example, INC [DI] instruction is a byte or word sized increment. The INC BYTE PTR[DI] instruction clearly indicates byte sized memory data. Example 5-6: Using INC instruction, program to add two consecutive bytes of data(stored at the data segment offset locations NUMB and NUMB+1) to the AL register. LEA DI,NUMB ;address MOV AL,0 ;clear sum ADD AL,[DI] ;add NUMB INC DI ;increment DI ADD AL,[DI] ;add NUMB+1 Table 5-2: Example increment instructions ADC(Addition with Carry) • This adds the bit in the carry-flag(C) to the operand-data (Table 5-3). • This mainly appears in software that adds numbers that are wider than 16 bits in the 8086. Example 5-7: To add the 32-bit number in BX and AX to the 32-bit number in DX and CX (Figure 5-1) ADD AX,CX ADC BX,DX Figure 5-1: ADC showing how the carry flag(C) links the two 16-bit additions into one 32-bit addition Table 5-3: Example add-with-carry instructions XADD (Exchange & Add) • This instruction is used in 80486-Core2 microprocessors. • This adds the source to the destination and stores the sum in the destination. • The difference is that after the addition takes place, the original value of the destination is copied into the source-operand. For example, if BL=12H and DL=02H, XADD BL,DL instruction executes, BL register contains the sum 14H and DL becomes 12H SUB (Subtraction) • Only types of subtraction not allowed are memory-to-memory and segment register subtractions. • This affects the flag bits (Table 5-4). Register Subtraction Example 5-9:To subtract the 16-bit contents of registers CX and DX from the contents of register BX SUB BX,CX SUB BX,DX Immediate Subtraction Example 5-10:To subtract 44H from 22H MOV CH,22H SUB CH,44H After the subtraction, the difference (0DEH) moves into the CH register. The flags change as follows for this subtraction: Z=0(result not zero) C=1(borrow) A=1(half borrow) S=1(result negative) P=1(even parity) O=0(no overflow) DEC (Decrement Subtraction) • This subtracts 1 from a register or the contents of a memory-location (Table 5-5). • The decrement indirect memory-data instructions require BYTE PTR or WORD PTR because the assembler cannot distinguish a byte from a word when an index-register addresses memory. • For example, DEC [SI] is unclear because the assembler cannot determine whether the location addressed by SI is a byte or word. • Using DEC BYTE PTR[SI],DEC WORD PTR[DI] tells the size of the data to the assembler. Subtraction-with-Borrow (SBB) • This functions as a regular subtraction except that the carry flag(which holds the borrow) also subtracts from the difference (Table 5-6). Example 5-11: Program to subtract BX-AX from SI-DI (Figure 5-2) SUB AX,DI SBB BX,SI Figure 5-2: Subtraction-with-borrow showing how the carry flag propagates the borrow. Table 5-6: Example subtraction-with-borrow instructions CMP(Comparison) • This is a subtraction that changes only the flag bits, destination-operand never changes (Table 5-7). • This is normally followed by a conditional jump instruction (which tests condition of the flag-bits) • Only types of comparison not allowed are memory-to-memory and segment register comparisons Example 5-12: CMP AL,10H ;compare AL against 10H JAE SUPER ;if AL is 10H or above CMPXCHG (Compare & Exchange) • This is used only in 80486-Core2 microprocessor. • This compares the destination-operand with the accumulator(AX). • If they are equal, the source-operand is copied into the destination; if they are not equal, the destination-operand is copied into the accumulator. For example, CMPXCHG CX, DX; this instruction first compares the contents of CX with AX. If CX=AX, DX is copied into AX; otherwise CX is copied into AX. 8-bit Multiplication (MUL) • The multiplicand is always in the AL register. The multiplier can be any 8-bit register or any memory location (Table 5-8). • The product after a multiplication is always a double-width product(AX). • Immediate multiplication is not allowed. • This contains one operand because it always multiplies the operand times the contents of register AL. For example, MUL BL ;this instruction multiplies the unsigned-contents of AL by the unsigned-contents of BL. • For signed multiplication(IMUL), the product is in binary-form, if positive & in 2's complement forms if negative. Example 5-13:Program to compute DX=BL*CL MOV BL,5 ;load data MOV CL,10 MOV AL,CL ;position data MUL BL ;multiply MOV DX,AX ;position product 16-bit Multiplication • AX contains the multiplicand while any 16-bit general purpose register contains the multiplier. • The 32-bit product is stored in DX-AX. DX always contains the most significant 16-bits of the product, and AX contains the least significant 16 bits. A Special Immediate 16-bit Multiplication • This instruction is available in 80286-Core2 microprocessors (Table 5-9). • This contains 3 operands. → First operand is 16-bit destination-register; → Second operand is a register or memory-location that contains the 16-bit multiplicand & → Third operand is either 8-bit or 16-bit immediate-data used as the multiplier Example: IMUL CX,DX,12H ;this instruction multiplies 12H times DX and leaves a 16-bit signed product in CX. 8-bit Division(DIV) • AX register is used to store the dividend that is divided by the contents of any 8-bit register or memory-location (Table 5-12). • After division, quotient appears in AL and remainder appears in AH. • For a signed division, quotient is positive or negative; the remainder always assumes the sign of the dividend and is always an integer. For example, if AX=0010(+16) and BL=0FDH (-3) and IDIV BL instruction executes AX=01FBH (This represents a quotient of -5(AL) with a remainder of 1(AH)) Example 5-14: Program to divide the unsigned byte contents of memory location NUMB by the unsigned contents of memory location NUMB1. MOV AL,NUMB ;get NUMB MOV AH,0 ;zero extend DIV NUMB1 ;divide by NUMB1 MOV ANSQ,AL ;save quotient MOV ANSR,AH ;save remainder 16-Bit Division • DX-AX register is used to store the dividend that is divided by the contents of any 16-bit register or memory-location (Table 5-13). • After division, the quotient appears in AX and the remainder appears in DX.