Scaled-Index Addressing

Scaled-index addressing uses two 32-bit registers (a base register and an index register) to access the memory. The second register (index) is multiplied by a scaling factor. The scaling factor can be.A scaling factor of is implied and need not be included in the assembly language instruction (MOV AL,[ EBX+ECX ]). A scaling factor of is used to address word-sized memory arrays,a scaling factor of is used with double word-sized memory arrays,and a scaling factor of is used with quad word-sized memory arrays. An example instruction is MOV AX,[EDI+2*ECX]. This instruction uses a scaling factor of , which multiplies the contents of ECX by 2 before adding it to the EDI register to form the memory address. If ECX contains a 00000000H, word-sized memory element 0 is addressed; ifECX contains a 00000001H, word-sized memory element 1 is accessed, and so forth. This scalesthe index (ECX) by a factor of 2 for a word-sized memory array. The MOV EAX,[ 4*EDI ] is a scaled-index instruction that uses one register to indirectly address memory. In the 64-bit mode, an instruction such as MOV RAX,[ 8*RDI] might appear in a program. RIP Relative Addressing This form of addressing uses the 64-bit instruction pointer register in the 64-bit mode to address a linear location in the flat memory model. The inline assembler program available to Visual does not contain any way of using this addressing mode or any other 64-bit addressing mode. The Microsoft Visual does not at present support developing 64-bit assembly code. The instruction pointer is normally addressed using a * as in , which is 34 bytes ahead in a program. Data Structures A data structure is used to specify how information is stored in a memory array and can be quite useful with applications that use arrays. It is best to think of a data structure as a template for data. The start of a structure is identified with the STRUC assembly language directive and the end with the ENDS statement. Program Memory-Addressing Modes Program memory-addressing modes, used with the JMP (jump) and CALL instructions, consist of three distinct forms: direct, relative, and indirect. This section introduces these three addressing forms, using the JMP instruction to illustrate their operation. Direct Program Memory Addressing • Many early microprocessors used this type of addressing for all jumps and calls. • This is also used in high-level languages such as the BASIC language (GOTO instructions). • The instructions store the address with the opcode. • An inter-segment jump is a jump to any memory location within the entire memory system. • The direct jump is often called a far jump because it can jump to any memory location for the next instruction. • In the real-mode, a far jump accesses any location within the first 1Mbyte of memory by changing both CS and IP. Figure 3-14: The 5-byte machine language version of a JMP[10000H] instruction Figure 3-15: A JMP[2] instruction . This instruction skips over the 2-bytes of memory that follows the JMP instruction Relative Program Memory Addressing • The term relative means "relative to the instruction pointer(IP)". • A 1-byte displacement is used in short jumps and a 2-byte displacement is used with near jumps and calls. • An intra-segment jump is a jump anywhere within the current code segment. Table 3-10: Examples of indirect program memory addressing Indirect Program Memory Addressing • If a 16-bit register holds the address of a JMP instruction, the jump is near. For example, if the BX register contains 1000H and a JMP BX instruction executes, the microprocessor jumps to offset address 1000H in the current code segment. • If a relative register holds the address, the jump is also considered to be an indirect jump. For example, JMP[BX] refers to the memory location within the data segment at the offset address contained in BX. At this offset address is a 16-bit number that is used as the offset address in the intra-segment jump. This type of jumps is called an indirect-indirect or double-indirect jump. Stack Memory Addressing Modes • The stack holds data temporarily and stores the return-addresses used by procedures. • The stack-memory is an LIFO memory. • Data are placed onto the stack with a PUSH instruction and removed with a POP instruction. • CALL instruction also uses the stack to hold the return-address for procedures. (RET instruction is used to remove the return address from the stack). • The stack-memory is maintained by 2 registers: stack-pointer (SP) & stack segment(SS). • Whenever a data-word is pushed onto the stack, the high-order 8 bits are placed in the location addressed by SP-1 The low-order 8 bits are placed in the location addressed by SP-2. The SP is then decremented by 2. • The SP register always points to an area-of-memory located within the stack-segment. • In real mode, the SP register adds to SS*10H to form the stack memory-address • Whenever data are popped from the stack, The low-order 8 bits are removed from the location addressed by SP. The high-order 8 bits are removed from the location addressed by SP+1. The SP register is then incremented by 2. • In 8086, PUSH & POP store or retrieve words of data but never bytes • The PUSHA and POPA instructions either push or pop all the registers except segment-registers onto the stack. Figure 3-17: The PUSH & POP instructions: a) PUSH BX places the contents of BX into the stack b) POP CX removes data from the stack and places them into CX.